Errata, Chapter 12, EMRFD
p12.8, text 1.2 inch down from top of text.
Replace "see Chapter 4" with "see Chapter 6." (5May11)
Fig 12.9. Top-middle of figure. The
power supply shown for U3B is marked as +12K, which is the keyed
line. This should merely be +12. (16Oct07)
Fig 12.10. Place a 1 Meg resistor across the diode
that drives the gate of Q14 through a large R. The
added resistor will turn the FET off during receive periods,
allowing the audio gain to again increase to a high level.
Also, reverse the polarity of the 4.7 uF capacitor
attached to the 680 resistor leading to pin 2 of U5A.
Middle column, 1 inch down from top of text.
Replace Weinbridge with Wienbridge. (12March08)
Fig 12.21 There should be a 200 pF capacitor from the base
of Q3 to ground. This part of the schematic is shown
below. Also, the blocking capacitor between Q4 output and
the input to the product detector is .01 uF, although it is not
Fig 12.37. T2 is 10 bifilar turns on a FT-37-43, or
p12.29, top of right column: That's 1
Ohm rather than 1-W. (24Feb03)
12.39. The inductors in the low pass filter
(L1, L2, L3) are respectively 365, 403, and 365
nH. They are 9, 10, and 9 turns #24 on T30-6
toroid cores. The windings are compressed to
obtain the required L. (16June14)
p12.32, Fig 12.43. This
is a parts layout for the receiver system of Fig 12.40.
Q4 should be rotated by 180 degrees. The correct
layout can be seen in the photo of the board in the upper right
corner of the page. (13March08)
Fig 12.43. Rotate Q1, Q2, and Q3, as well as Q4.
Q5 and Q6 are OK. This impacts the figure, but not the
the parts were symmetrical. (22Aug9)
p12.35, Fig 12.48. The first
integrated circuit in the signal path from VXO In is U3. (30June03)
Fig 12.48. The integrated circuit marked as U3 should be
marked as U4. This is the 144 MHz amplifier that follows
the triple tuned circuit. A MAV-11 is appropriate,
parts will also work here. (10Aug07)
Fig 12.73. A new schematic was drafted that should
be easier to read.